Index

Symbols

"&"[bounded_string,bounded_string return bounded_string] (VHDL function) "&"[bounded_string,character return bounded_string] (VHDL function) "&"[bounded_string,string return bounded_string] (VHDL function) "&"[character,bounded_string return bounded_string] (VHDL function) "&"[string,bounded_string return bounded_string] (VHDL function) "*"[natural,bounded_string return bounded_string] (VHDL function) "*"[natural,character return bounded_string] (VHDL function) "*"[natural,character return string] (VHDL function) "*"[natural,string return bounded_string] (VHDL function) "*"[natural,string return string] (VHDL function) "-"[character_set,character_set return character_set] (VHDL function) "<"[bounded_string,bounded_string return boolean] (VHDL function) "<"[bounded_string,string return boolean] (VHDL function)

"<"[string,bounded_string return boolean] (VHDL function) "<="[bounded_string,bounded_string return boolean] (VHDL function) "<="[bounded_string,string return boolean] (VHDL function) "<="[string,bounded_string return boolean] (VHDL function) "="[bounded_string,bounded_string return boolean] (VHDL function) "="[bounded_string,string return boolean] (VHDL function) "="[string,bounded_string return boolean] (VHDL function) "[bounded_string,bounded_string return boolean]">">"[bounded_string,bounded_string return boolean] (VHDL function) "[bounded_string,string return boolean]">">"[bounded_string,string return boolean] (VHDL function) "[string,bounded_string return boolean]">">"[string,bounded_string return boolean] (VHDL function) ="[bounded_string,bounded_string return boolean]">">="[bounded_string,bounded_string return boolean] (VHDL function) ="[bounded_string,string return boolean]">">="[bounded_string,string return boolean] (VHDL function) ="[string,bounded_string return boolean]">">="[string,bounded_string return boolean] (VHDL function)

A

Acute (VHDL constant) adjust_angle[signed,signed,signed,signed,signed,signed] (VHDL procedure) alignment (VHDL type) ALPHANUMERIC_SET (VHDL constant) Ampersand (VHDL constant) Apostrophe (VHDL constant) append[bounded_string,bounded_string,truncation return bounded_string] (VHDL function) append[bounded_string,bounded_string,truncation] (VHDL procedure) append[bounded_string,character,truncation return bounded_string] (VHDL function) append[bounded_string,character,truncation] (VHDL procedure) append[bounded_string,string,truncation return bounded_string] (VHDL function) append[bounded_string,string,truncation] (VHDL procedure) append[character,bounded_string,truncation return bounded_string] (VHDL function)

append[string,bounded_string,truncation return bounded_string] (VHDL function) append[string,text_buffer] (VHDL procedure) append[unbounded_string,character] (VHDL procedure) append[unbounded_string,string] (VHDL procedure) append[unbounded_string,text_buffer] (VHDL procedure) append[unbounded_string,unbounded_string] (VHDL procedure) append_file[string,text_buffer] (VHDL procedure) append_file[text,text_buffer] (VHDL procedure) array_glitch_filter (VHDL entity) Asterisk (VHDL constant) attenuate (VHDL entity) attenuation_factor (VHDL type) attenuation_gain[attenuation_factor,positive return signed] (VHDL function)

B

BASIC_MAP (VHDL constant) BASIC_SET (VHDL constant) bcd_to_binary (VHDL entity) binary_to_bcd (VHDL entity) bit_size[natural return natural] (VHDL function)

bit_synchronizer (VHDL entity) bounded_string (VHDL type) Broken_Bar (VHDL constant) buffer_line (VHDL type) buffer_line_acc (VHDL type)

C

Cedilla (VHDL constant) ceil_log2[positive return natural] (VHDL function) ceil_log[positive,positive return natural] (VHDL function) Cent_Sign (VHDL constant) character_mapping (VHDL type) character_range (VHDL type) character_ranges (VHDL type) character_sequence (VHDL type) character_set (VHDL type) check_parity[parity_kind,std_ulogic_vector,std_ulogic return boolean] (VHDL function) Circumflex (VHDL constant) clock_cycles (VHDL type) clock_gen[std_ulogic,boolean,delay_length,duty_cycle] (VHDL procedure) clock_gen[std_ulogic,boolean,frequency,duty_cycle] (VHDL procedure) CODEC_DECODE (VHDL constant) CODEC_ENCODE (VHDL constant) Colon (VHDL constant) Comma (VHDL constant) Commercial_At (VHDL constant)

CONTROL_SET (VHDL constant) copy[string,unbounded_string,integer] (VHDL procedure) copy[unbounded_string,unbounded_string,integer] (VHDL procedure) Copyright_Sign (VHDL constant) cordic_flex_pipelined (VHDL entity) cordic_gain[positive return real] (VHDL function) cordic_mode (VHDL type) cordic_pipelined (VHDL entity) cordic_sequential (VHDL entity) count[bounded_string,character_set return natural] (VHDL function) count[bounded_string,string,character_mapping return natural] (VHDL function) count[string,character_set return natural] (VHDL function) count[string,string,character_mapping return natural] (VHDL function) count[unbounded_string,string,natural] (VHDL procedure) count_ones (VHDL entity) count_ones_chunked (VHDL entity) count_ones_sequential (VHDL entity) crc (VHDL entity) Currency_Sign (VHDL constant)

D

ddfs (VHDL entity) ddfs_dynamic_factor[real,natural,natural return natural] (VHDL function) ddfs_dynamic_inc[natural,natural,unsigned,unsigned] (VHDL procedure) ddfs_error[real,real,natural return real] (VHDL function) ddfs_frequency[real,real,natural return real] (VHDL function) ddfs_increment[real,real,natural return natural] (VHDL function) ddfs_increment[real,real,natural return unsigned] (VHDL function) ddfs_pipelined (VHDL entity) ddfs_size[real,real,real return natural] (VHDL function) ddfs_tolerance[real,real,natural return real] (VHDL function) DECIMAL_DIGIT_SET (VHDL constant) decimal_size[natural return natural] (VHDL function) decode[unsigned return std_ulogic_vector] (VHDL function), [1] decode[unsigned,positive return std_ulogic_vector] (VHDL function), [1] Degree_Sign (VHDL constant) degrees_to_phase[real,positive return unsigned] (VHDL function) delete[bounded_string,positive,natural return bounded_string] (VHDL function)

delete[bounded_string,positive,natural] (VHDL procedure) delete[string,positive,natural return string] (VHDL function) delete[string,positive,natural,alignment,character] (VHDL procedure) delete[unbounded_string,positive,natural] (VHDL procedure) demux[std_ulogic,unsigned,positive return std_ulogic_vector] (VHDL function), [1] Diaeresis (VHDL constant) direction (VHDL type) Division_Sign (VHDL constant) Dollar_Sign (VHDL constant) dual_port_ram (VHDL entity) duty_cycle (VHDL type) dynamic_array_glitch_filter (VHDL entity) dynamic_delay_line_signed (VHDL entity) dynamic_delay_line_sulv (VHDL entity) dynamic_delay_line_unsigned (VHDL entity) dynamic_glitch_filter (VHDL entity) dynamic_oscillator (VHDL entity) dynamic_oscillator_sequential (VHDL entity)

E

ecc_range (VHDL type) ecc_vector (VHDL type) effective_fractional_bits[positive,positive return real] (VHDL function) element[bounded_string,positive return character] (VHDL function) element[unbounded_string,positive,character] (VHDL procedure) encoding_size[positive return natural] (VHDL function) end_crc[bit_vector,boolean,bit_vector return bit_vector] (VHDL function) endbuffer[text_buffer,boolean] (VHDL procedure) endianness (VHDL type) eq[unbounded_string,string,boolean] (VHDL procedure) eq[unbounded_string,unbounded_string,boolean] (VHDL procedure) Equals_Sign (VHDL constant) Exclamation (VHDL constant) extras.arithmetic (package) extras.arithmetic.pipelined_adder (VHDL entity) extras.bcd_conversion (package) extras.bcd_conversion.bcd_to_binary (VHDL entity) extras.bcd_conversion.binary_to_bcd (VHDL entity) extras.bcd_conversion.decimal_size[natural return natural] (VHDL function) extras.bcd_conversion.to_bcd[unsigned return unsigned] (VHDL function) extras.bcd_conversion.to_binary[unsigned return unsigned] (VHDL function) extras.binaryio (package) extras.binaryio.endianness (VHDL type) extras.binaryio.octet_file (VHDL type) extras.binaryio.read[octet_file,endianness,signed] (VHDL procedure) extras.binaryio.read[octet_file,endianness,unsigned] (VHDL procedure) extras.binaryio.write[octet_file,endianness,signed] (VHDL procedure) extras.binaryio.write[octet_file,endianness,unsigned] (VHDL procedure) extras.bit_ops (package) extras.bit_ops.count_ones (VHDL entity) extras.bit_ops.count_ones_chunked (VHDL entity) extras.bit_ops.count_ones_sequential (VHDL entity) extras.bit_ops.gen_count_ones_table[positive return natural_vector] (VHDL function) extras.bit_ops.natural_vector (VHDL type) extras.characters_handling (package) extras.characters_handling.Is_Alphanumeric[character return boolean] (VHDL function) extras.characters_handling.Is_Basic[character return boolean] (VHDL function) extras.characters_handling.Is_Control[character return boolean] (VHDL function) extras.characters_handling.Is_Digit[character return boolean] (VHDL function) extras.characters_handling.Is_Graphic[character return boolean] (VHDL function) extras.characters_handling.Is_Hexadecimal_Digit[character return boolean] (VHDL function) extras.characters_handling.Is_Letter[character return boolean] (VHDL function) extras.characters_handling.Is_Lower[character return boolean] (VHDL function) extras.characters_handling.Is_Special[character return boolean] (VHDL function) extras.characters_handling.Is_Upper[character return boolean] (VHDL function) extras.characters_handling.To_Basic[character return character] (VHDL function) extras.characters_handling.To_Basic[string return string] (VHDL function) extras.characters_handling.To_Lower[character return character] (VHDL function) extras.characters_handling.To_Lower[string return string] (VHDL function) extras.characters_handling.To_Upper[character return character] (VHDL function) extras.characters_handling.To_Upper[string return string] (VHDL function) extras.characters_latin_1 (package) extras.characters_latin_1.Acute (VHDL constant) extras.characters_latin_1.Ampersand (VHDL constant) extras.characters_latin_1.Apostrophe (VHDL constant) extras.characters_latin_1.Asterisk (VHDL constant) extras.characters_latin_1.Broken_Bar (VHDL constant) extras.characters_latin_1.Cedilla (VHDL constant) extras.characters_latin_1.Cent_Sign (VHDL constant) extras.characters_latin_1.Circumflex (VHDL constant) extras.characters_latin_1.Colon (VHDL constant) extras.characters_latin_1.Comma (VHDL constant) extras.characters_latin_1.Commercial_At (VHDL constant) extras.characters_latin_1.Copyright_Sign (VHDL constant) extras.characters_latin_1.Currency_Sign (VHDL constant) extras.characters_latin_1.Degree_Sign (VHDL constant) extras.characters_latin_1.Diaeresis (VHDL constant) extras.characters_latin_1.Division_Sign (VHDL constant) extras.characters_latin_1.Dollar_Sign (VHDL constant) extras.characters_latin_1.Equals_Sign (VHDL constant) extras.characters_latin_1.Exclamation (VHDL constant) extras.characters_latin_1.Feminine_Ordinal_Indicator (VHDL constant) extras.characters_latin_1.Fraction_One_Half (VHDL constant) extras.characters_latin_1.Fraction_One_Quarter (VHDL constant) extras.characters_latin_1.Fraction_Three_Quarters (VHDL constant) extras.characters_latin_1.Full_Stop (VHDL constant) extras.characters_latin_1.Grave (VHDL constant) extras.characters_latin_1.Greater_Than_Sign (VHDL constant) extras.characters_latin_1.Hyphen (VHDL constant) extras.characters_latin_1.Inverted_Exclamation (VHDL constant) extras.characters_latin_1.Inverted_Question (VHDL constant) extras.characters_latin_1.LC_A (VHDL constant) extras.characters_latin_1.LC_A_Acute (VHDL constant) extras.characters_latin_1.LC_A_Circumflex (VHDL constant) extras.characters_latin_1.LC_A_Diaeresis (VHDL constant) extras.characters_latin_1.LC_A_Grave (VHDL constant) extras.characters_latin_1.LC_A_Ring (VHDL constant) extras.characters_latin_1.LC_A_Tilde (VHDL constant) extras.characters_latin_1.LC_AE_Diphthong (VHDL constant) extras.characters_latin_1.LC_B (VHDL constant) extras.characters_latin_1.LC_C (VHDL constant) extras.characters_latin_1.LC_C_Cedilla (VHDL constant) extras.characters_latin_1.LC_D (VHDL constant) extras.characters_latin_1.LC_E (VHDL constant) extras.characters_latin_1.LC_E_Acute (VHDL constant) extras.characters_latin_1.LC_E_Circumflex (VHDL constant) extras.characters_latin_1.LC_E_Diaeresis (VHDL constant) extras.characters_latin_1.LC_E_Grave (VHDL constant) extras.characters_latin_1.LC_F (VHDL constant) extras.characters_latin_1.LC_G (VHDL constant) extras.characters_latin_1.LC_German_Sharp_S (VHDL constant) extras.characters_latin_1.LC_H (VHDL constant) extras.characters_latin_1.LC_I (VHDL constant) extras.characters_latin_1.LC_I_Acute (VHDL constant) extras.characters_latin_1.LC_I_Circumflex (VHDL constant) extras.characters_latin_1.LC_I_Diaeresis (VHDL constant) extras.characters_latin_1.LC_I_Grave (VHDL constant) extras.characters_latin_1.LC_Icelandic_Eth (VHDL constant) extras.characters_latin_1.LC_Icelandic_Thorn (VHDL constant) extras.characters_latin_1.LC_J (VHDL constant) extras.characters_latin_1.LC_K (VHDL constant) extras.characters_latin_1.LC_L (VHDL constant) extras.characters_latin_1.LC_M (VHDL constant) extras.characters_latin_1.LC_N (VHDL constant) extras.characters_latin_1.LC_N_Tilde (VHDL constant) extras.characters_latin_1.LC_O (VHDL constant) extras.characters_latin_1.LC_O_Acute (VHDL constant) extras.characters_latin_1.LC_O_Circumflex (VHDL constant) extras.characters_latin_1.LC_O_Diaeresis (VHDL constant) extras.characters_latin_1.LC_O_Grave (VHDL constant) extras.characters_latin_1.LC_O_Oblique_Stroke (VHDL constant) extras.characters_latin_1.LC_O_Tilde (VHDL constant) extras.characters_latin_1.LC_P (VHDL constant) extras.characters_latin_1.LC_Q (VHDL constant) extras.characters_latin_1.LC_R (VHDL constant) extras.characters_latin_1.LC_S (VHDL constant) extras.characters_latin_1.LC_T (VHDL constant) extras.characters_latin_1.LC_U (VHDL constant) extras.characters_latin_1.LC_U_Acute (VHDL constant) extras.characters_latin_1.LC_U_Circumflex (VHDL constant) extras.characters_latin_1.LC_U_Diaeresis (VHDL constant) extras.characters_latin_1.LC_U_Grave (VHDL constant) extras.characters_latin_1.LC_V (VHDL constant) extras.characters_latin_1.LC_W (VHDL constant) extras.characters_latin_1.LC_X (VHDL constant) extras.characters_latin_1.LC_Y (VHDL constant) extras.characters_latin_1.LC_Y_Acute (VHDL constant) extras.characters_latin_1.LC_Y_Diaeresis (VHDL constant) extras.characters_latin_1.LC_Z (VHDL constant) extras.characters_latin_1.Left_Angle_Quotation (VHDL constant) extras.characters_latin_1.Left_Curly_Bracket (VHDL constant) extras.characters_latin_1.Left_Parenthesis (VHDL constant) extras.characters_latin_1.Left_Square_Bracket (VHDL constant) extras.characters_latin_1.Less_Than_Sign (VHDL constant) extras.characters_latin_1.Low_Line (VHDL constant) extras.characters_latin_1.Macron (VHDL constant) extras.characters_latin_1.Masculine_Ordinal_Indicator (VHDL constant) extras.characters_latin_1.Micro_Sign (VHDL constant) extras.characters_latin_1.Middle_Dot (VHDL constant) extras.characters_latin_1.Multiplication_Sign (VHDL constant) extras.characters_latin_1.No_Break_Space (VHDL constant) extras.characters_latin_1.Not_Sign (VHDL constant) extras.characters_latin_1.Number_Sign (VHDL constant) extras.characters_latin_1.Percent_Sign (VHDL constant) extras.characters_latin_1.Pilcrow_Sign (VHDL constant) extras.characters_latin_1.Plus_Minus_Sign (VHDL constant) extras.characters_latin_1.Plus_Sign (VHDL constant) extras.characters_latin_1.Pound_Sign (VHDL constant) extras.characters_latin_1.Question (VHDL constant) extras.characters_latin_1.Quotation (VHDL constant) extras.characters_latin_1.Registered_Trade_Mark_Sign (VHDL constant) extras.characters_latin_1.Reverse_Solidus (VHDL constant) extras.characters_latin_1.Right_Angle_Quotation (VHDL constant) extras.characters_latin_1.Right_Curly_Bracket (VHDL constant) extras.characters_latin_1.Right_Parenthesis (VHDL constant) extras.characters_latin_1.Right_Square_Bracket (VHDL constant) extras.characters_latin_1.Section_Sign (VHDL constant) extras.characters_latin_1.Semicolon (VHDL constant) extras.characters_latin_1.Soft_Hyphen (VHDL constant) extras.characters_latin_1.Solidus (VHDL constant) extras.characters_latin_1.Space (VHDL constant) extras.characters_latin_1.Superscript_One (VHDL constant) extras.characters_latin_1.Superscript_Three (VHDL constant) extras.characters_latin_1.Superscript_Two (VHDL constant) extras.characters_latin_1.Tilde (VHDL constant) extras.characters_latin_1.UC_A_Acute (VHDL constant) extras.characters_latin_1.UC_A_Circumflex (VHDL constant) extras.characters_latin_1.UC_A_Diaeresis (VHDL constant) extras.characters_latin_1.UC_A_Grave (VHDL constant) extras.characters_latin_1.UC_A_Ring (VHDL constant) extras.characters_latin_1.UC_A_Tilde (VHDL constant) extras.characters_latin_1.UC_AE_Diphthong (VHDL constant) extras.characters_latin_1.UC_C_Cedilla (VHDL constant) extras.characters_latin_1.UC_E_Acute (VHDL constant) extras.characters_latin_1.UC_E_Circumflex (VHDL constant) extras.characters_latin_1.UC_E_Diaeresis (VHDL constant) extras.characters_latin_1.UC_E_Grave (VHDL constant) extras.characters_latin_1.UC_I_Acute (VHDL constant) extras.characters_latin_1.UC_I_Circumflex (VHDL constant) extras.characters_latin_1.UC_I_Diaeresis (VHDL constant) extras.characters_latin_1.UC_I_Grave (VHDL constant) extras.characters_latin_1.UC_Icelandic_Eth (VHDL constant) extras.characters_latin_1.UC_Icelandic_Thorn (VHDL constant) extras.characters_latin_1.UC_N_Tilde (VHDL constant) extras.characters_latin_1.UC_O_Acute (VHDL constant) extras.characters_latin_1.UC_O_Circumflex (VHDL constant) extras.characters_latin_1.UC_O_Diaeresis (VHDL constant) extras.characters_latin_1.UC_O_Grave (VHDL constant) extras.characters_latin_1.UC_O_Oblique_Stroke (VHDL constant) extras.characters_latin_1.UC_O_Tilde (VHDL constant) extras.characters_latin_1.UC_U_Acute (VHDL constant) extras.characters_latin_1.UC_U_Circumflex (VHDL constant) extras.characters_latin_1.UC_U_Diaeresis (VHDL constant) extras.characters_latin_1.UC_U_Grave (VHDL constant) extras.characters_latin_1.UC_Y_Acute (VHDL constant) extras.characters_latin_1.Vertical_Line (VHDL constant) extras.characters_latin_1.Yen_Sign (VHDL constant) extras.cordic (package) extras.cordic.adjust_angle[signed,signed,signed,signed,signed,signed] (VHDL procedure) extras.cordic.cordic_flex_pipelined (VHDL entity) extras.cordic.cordic_gain[positive return real] (VHDL function) extras.cordic.cordic_mode (VHDL type) extras.cordic.cordic_pipelined (VHDL entity) extras.cordic.cordic_sequential (VHDL entity) extras.cordic.effective_fractional_bits[positive,positive return real] (VHDL function) extras.cordic.rotate[integer,signed,signed,signed,signed,signed,signed] (VHDL procedure) extras.cordic.sincos_pipelined (VHDL entity) extras.cordic.sincos_sequential (VHDL entity) extras.cordic.vector[integer,signed,signed,signed,signed,signed,signed] (VHDL procedure) extras.crc_ops (package) extras.crc_ops.crc (VHDL entity) extras.crc_ops.end_crc[bit_vector,boolean,bit_vector return bit_vector] (VHDL function) extras.crc_ops.init_crc[bit_vector return bit_vector] (VHDL function) extras.crc_ops.next_crc[bit_vector,bit_vector,boolean,bit_vector return bit_vector] (VHDL function) extras.ddfs_pkg (package) extras.ddfs_pkg.ddfs (VHDL entity) extras.ddfs_pkg.ddfs_dynamic_factor[real,natural,natural return natural] (VHDL function) extras.ddfs_pkg.ddfs_dynamic_inc[natural,natural,unsigned,unsigned] (VHDL procedure) extras.ddfs_pkg.ddfs_error[real,real,natural return real] (VHDL function) extras.ddfs_pkg.ddfs_frequency[real,real,natural return real] (VHDL function) extras.ddfs_pkg.ddfs_increment[real,real,natural return natural] (VHDL function) extras.ddfs_pkg.ddfs_increment[real,real,natural return unsigned] (VHDL function) extras.ddfs_pkg.ddfs_pipelined (VHDL entity) extras.ddfs_pkg.ddfs_size[real,real,real return natural] (VHDL function) extras.ddfs_pkg.ddfs_tolerance[real,real,natural return real] (VHDL function) extras.ddfs_pkg.degrees_to_phase[real,positive return unsigned] (VHDL function) extras.ddfs_pkg.min_fraction_bits[real,real,natural,real return natural] (VHDL function) extras.ddfs_pkg.radians_to_phase[real,positive return unsigned] (VHDL function) extras.ddfs_pkg.resize_fractional[unsigned,positive return unsigned] (VHDL function) extras.fifos (package) extras.fifos.fifo (VHDL entity) extras.fifos.packet_fifo (VHDL entity) extras.fifos.simple_fifo (VHDL entity) extras.glitch_filtering (package) extras.glitch_filtering.array_glitch_filter (VHDL entity) extras.glitch_filtering.dynamic_array_glitch_filter (VHDL entity) extras.glitch_filtering.dynamic_glitch_filter (VHDL entity) extras.glitch_filtering.glitch_filter (VHDL entity) extras.gray_code (package) extras.gray_code.gray_counter (VHDL entity) extras.gray_code.to_binary[std_logic_vector return std_logic_vector] (VHDL function) extras.gray_code.to_binary[std_ulogic_vector return std_ulogic_vector] (VHDL function) extras.gray_code.to_binary[unsigned return unsigned] (VHDL function) extras.gray_code.to_gray[std_logic_vector return std_logic_vector] (VHDL function) extras.gray_code.to_gray[std_ulogic_vector return std_ulogic_vector] (VHDL function) extras.gray_code.to_gray[unsigned return unsigned] (VHDL function) extras.hamming_edac (package) extras.hamming_edac.ecc_range (VHDL type) extras.hamming_edac.ecc_vector (VHDL type) extras.hamming_edac.get_data[ecc_vector return std_ulogic_vector] (VHDL function) extras.hamming_edac.get_parity[ecc_vector return unsigned] (VHDL function) extras.hamming_edac.hamming_data_size[positive return positive] (VHDL function) extras.hamming_edac.hamming_decode[ecc_vector return std_ulogic_vector] (VHDL function) extras.hamming_edac.hamming_decode[std_ulogic_vector,unsigned return std_ulogic_vector] (VHDL function) extras.hamming_edac.hamming_encode[std_ulogic_vector return ecc_vector] (VHDL function) extras.hamming_edac.hamming_encode[std_ulogic_vector,unsigned return ecc_vector] (VHDL function) extras.hamming_edac.hamming_has_error[ecc_vector return boolean] (VHDL function) extras.hamming_edac.hamming_has_error[unsigned return boolean] (VHDL function) extras.hamming_edac.hamming_indices[positive return ecc_range] (VHDL function) extras.hamming_edac.hamming_interleave[ecc_vector return std_ulogic_vector] (VHDL function) extras.hamming_edac.hamming_interleave[std_ulogic_vector,unsigned return std_ulogic_vector] (VHDL function) extras.hamming_edac.hamming_message_size[positive return positive] (VHDL function) extras.hamming_edac.hamming_parity[std_ulogic_vector return unsigned] (VHDL function) extras.hamming_edac.hamming_parity_size[positive return positive] (VHDL function) extras.hamming_edac.to_ecc_vec[std_ulogic_vector,natural return ecc_vector] (VHDL function) extras.hamming_edac.to_sulv[ecc_vector return std_ulogic_vector] (VHDL function) extras.interrupt_ctl_pkg (package) extras.interrupt_ctl_pkg.interrupt_ctl (VHDL entity) extras.lcar_ops (package) extras.lcar_ops.lcar_rule[positive return std_ulogic_vector] (VHDL function) extras.lcar_ops.next_wolfram_lcar[std_ulogic_vector,std_ulogic_vector,std_ulogic,std_ulogic return std_ulogic_vector] (VHDL function) extras.lcar_ops.wolfram_lcar (VHDL entity) extras.lfsr_ops (package) extras.lfsr_ops.fibonacci_lfsr (VHDL entity) extras.lfsr_ops.galois_lfsr (VHDL entity) extras.lfsr_ops.lfsr_coefficients (VHDL type) extras.lfsr_ops.lfsr_kind (VHDL type) extras.lfsr_ops.lfsr_taps[positive return std_ulogic_vector] (VHDL function) extras.lfsr_ops.next_fibonacci_lfsr[std_ulogic_vector,std_ulogic_vector,lfsr_kind,boolean return std_ulogic_vector] (VHDL function) extras.lfsr_ops.next_galois_lfsr[std_ulogic_vector,std_ulogic_vector,lfsr_kind,boolean return std_ulogic_vector] (VHDL function) extras.lfsr_ops.to_tap_map[lfsr_coefficients,positive,boolean return std_ulogic_vector] (VHDL function) extras.memory (package) extras.memory.dual_port_ram (VHDL entity) extras.memory.rom (VHDL entity) extras.memory.rom_format (VHDL type) extras.muxing (package) extras.muxing.decode[unsigned return std_ulogic_vector] (VHDL function) extras.muxing.decode[unsigned,positive return std_ulogic_vector] (VHDL function) extras.muxing.demux[std_ulogic,unsigned,positive return std_ulogic_vector] (VHDL function) extras.muxing.mux[std_ulogic_vector,std_ulogic_vector return std_ulogic] (VHDL function) extras.muxing.mux[std_ulogic_vector,unsigned return std_ulogic] (VHDL function) extras.oscillator (package) extras.oscillator.dynamic_oscillator (VHDL entity) extras.oscillator.dynamic_oscillator_sequential (VHDL entity) extras.oscillator.fixed_oscillator (VHDL entity) extras.oscillator.fixed_oscillator_sequential (VHDL entity) extras.parity_ops (package) extras.parity_ops.check_parity[parity_kind,std_ulogic_vector,std_ulogic return boolean] (VHDL function) extras.parity_ops.parity[parity_kind,std_ulogic_vector return std_ulogic] (VHDL function)

extras.parity_ops.parity_kind (VHDL type) extras.pipelining (package) extras.pipelining.dynamic_delay_line_signed (VHDL entity) extras.pipelining.dynamic_delay_line_sulv (VHDL entity) extras.pipelining.dynamic_delay_line_unsigned (VHDL entity) extras.pipelining.fixed_delay_line (VHDL entity) extras.pipelining.fixed_delay_line_signed (VHDL entity) extras.pipelining.fixed_delay_line_sulv (VHDL entity) extras.pipelining.fixed_delay_line_unsigned (VHDL entity) extras.pipelining.pipeline_s (VHDL entity) extras.pipelining.pipeline_slv (VHDL entity) extras.pipelining.pipeline_sulv (VHDL entity) extras.pipelining.pipeline_u (VHDL entity) extras.pipelining.pipeline_ul (VHDL entity) extras.random (package) extras.random.randint[integer,integer return integer] (VHDL function) extras.random.random[ return boolean] (VHDL function) extras.random.random[ return character] (VHDL function) extras.random.random[ return natural] (VHDL function) extras.random.random[ return real] (VHDL function) extras.random.random[positive return bit_vector] (VHDL function) extras.random.randtime[time,time return time] (VHDL function) extras.random.seed[positive,positive] (VHDL procedure) extras.random.seed[positive] (VHDL procedure) extras.reg_file_pkg (package) extras.reg_file_pkg.reg_array (VHDL type) extras.reg_file_pkg.reg_file (VHDL entity) extras.reg_file_pkg.reg_word (VHDL type) extras.secded_codec_pkg (package) extras.secded_codec_pkg.CODEC_DECODE (VHDL constant) extras.secded_codec_pkg.CODEC_ENCODE (VHDL constant) extras.secded_codec_pkg.INSERT_DOUBLE (VHDL constant) extras.secded_codec_pkg.INSERT_NONE (VHDL constant) extras.secded_codec_pkg.INSERT_SINGLE (VHDL constant) extras.secded_codec_pkg.secded_codec (VHDL entity) extras.secded_edac (package) extras.secded_edac.secded_data_size[positive return positive] (VHDL function) extras.secded_edac.secded_decode[ecc_vector return std_ulogic_vector] (VHDL function) extras.secded_edac.secded_encode[std_ulogic_vector return ecc_vector] (VHDL function) extras.secded_edac.secded_encode[std_ulogic_vector,unsigned return ecc_vector] (VHDL function) extras.secded_edac.secded_error_kind (VHDL type) extras.secded_edac.secded_errors (VHDL type) extras.secded_edac.secded_has_errors[ecc_vector return secded_errors] (VHDL function) extras.secded_edac.secded_has_errors[ecc_vector,unsigned return secded_errors] (VHDL function) extras.secded_edac.secded_indices[positive return ecc_range] (VHDL function) extras.secded_edac.secded_message_size[positive return positive] (VHDL function) extras.secded_edac.secded_parity_size[positive return positive] (VHDL function) extras.sizing (package) extras.sizing.bit_size[natural return natural] (VHDL function) extras.sizing.ceil_log2[positive return natural] (VHDL function) extras.sizing.ceil_log[positive,positive return natural] (VHDL function) extras.sizing.encoding_size[positive return natural] (VHDL function) extras.sizing.floor_log2[positive return natural] (VHDL function) extras.sizing.floor_log[positive,positive return natural] (VHDL function) extras.sizing.signed_size[integer return natural] (VHDL function) extras.strings (package) extras.strings.alignment (VHDL type) extras.strings.direction (VHDL type) extras.strings.membership (VHDL type) extras.strings.trim_end (VHDL type) extras.strings.truncation (VHDL type) extras.strings_fixed (package) extras.strings_fixed."*"[natural,character return string] (VHDL function) extras.strings_fixed."*"[natural,string return string] (VHDL function) extras.strings_fixed.count[string,character_set return natural] (VHDL function) extras.strings_fixed.count[string,string,character_mapping return natural] (VHDL function) extras.strings_fixed.delete[string,positive,natural return string] (VHDL function) extras.strings_fixed.delete[string,positive,natural,alignment,character] (VHDL procedure) extras.strings_fixed.find_token[string,character_set,membership,positive,natural] (VHDL procedure) extras.strings_fixed.hash[string return natural] (VHDL function) extras.strings_fixed.head[string,natural,alignment,character] (VHDL procedure) extras.strings_fixed.head[string,natural,character return string] (VHDL function) extras.strings_fixed.index[string,character_set,membership,direction return natural] (VHDL function) extras.strings_fixed.index[string,string,direction,character_mapping return natural] (VHDL function) extras.strings_fixed.index_non_blank[string,direction return natural] (VHDL function) extras.strings_fixed.insert[string,positive,string return string] (VHDL function) extras.strings_fixed.insert[string,positive,string,truncation] (VHDL procedure) extras.strings_fixed.move[string,string,truncation,alignment,character] (VHDL procedure) extras.strings_fixed.overwrite[string,positive,string return string] (VHDL function) extras.strings_fixed.overwrite[string,positive,string,truncation] (VHDL procedure) extras.strings_fixed.replace_slice[string,positive,natural,string return string] (VHDL function) extras.strings_fixed.replace_slice[string,positive,natural,string,truncation,alignment,character] (VHDL procedure) extras.strings_fixed.tail[string,natural,alignment,character] (VHDL procedure) extras.strings_fixed.tail[string,natural,character return string] (VHDL function) extras.strings_fixed.translate[string,character_mapping return string] (VHDL function) extras.strings_fixed.translate[string,character_mapping] (VHDL procedure) extras.strings_fixed.trim[string,character_set,character_set return string] (VHDL function) extras.strings_fixed.trim[string,character_set,character_set,alignment,character] (VHDL procedure) extras.strings_fixed.trim[string,trim_end return string] (VHDL function) extras.strings_fixed.trim[string,trim_end,alignment,character] (VHDL procedure) extras.strings_maps (package) extras.strings_maps."-"[character_set,character_set return character_set] (VHDL function) extras.strings_maps.character_mapping (VHDL type) extras.strings_maps.character_range (VHDL type) extras.strings_maps.character_ranges (VHDL type) extras.strings_maps.character_sequence (VHDL type) extras.strings_maps.character_set (VHDL type) extras.strings_maps.is_in[character,character_set return boolean] (VHDL function) extras.strings_maps.is_subset[character_set,character_set return boolean] (VHDL function) extras.strings_maps.to_domain[character_mapping return character_sequence] (VHDL function) extras.strings_maps.to_mapping[character_sequence,character_sequence return character_mapping] (VHDL function) extras.strings_maps.to_range[character_mapping return character_sequence] (VHDL function) extras.strings_maps.to_ranges[character_set return character_ranges] (VHDL function) extras.strings_maps.to_sequence[character_set return character_sequence] (VHDL function) extras.strings_maps.to_set[character return character_set] (VHDL function) extras.strings_maps.to_set[character_range return character_set] (VHDL function) extras.strings_maps.to_set[character_ranges return character_set] (VHDL function) extras.strings_maps.to_set[character_sequence return character_set] (VHDL function) extras.strings_maps.value[character_mapping,character return character] (VHDL function) extras.strings_maps_constants (package) extras.strings_maps_constants.ALPHANUMERIC_SET (VHDL constant) extras.strings_maps_constants.BASIC_MAP (VHDL constant) extras.strings_maps_constants.BASIC_SET (VHDL constant) extras.strings_maps_constants.CONTROL_SET (VHDL constant) extras.strings_maps_constants.DECIMAL_DIGIT_SET (VHDL constant) extras.strings_maps_constants.GRAPHIC_SET (VHDL constant) extras.strings_maps_constants.HEXADECIMAL_DIGIT_SET (VHDL constant) extras.strings_maps_constants.IDENTITY (VHDL constant) extras.strings_maps_constants.ISO_646_SET (VHDL constant) extras.strings_maps_constants.LETTER_SET (VHDL constant) extras.strings_maps_constants.LOWER_CASE_MAP (VHDL constant) extras.strings_maps_constants.LOWER_SET (VHDL constant) extras.strings_maps_constants.NULL_SET (VHDL constant) extras.strings_maps_constants.SPECIAL_SET (VHDL constant) extras.strings_maps_constants.UPPER_CASE_MAP (VHDL constant) extras.strings_maps_constants.UPPER_SET (VHDL constant) extras.strings_unbounded (package) extras.strings_unbounded.append[unbounded_string,character] (VHDL procedure) extras.strings_unbounded.append[unbounded_string,string] (VHDL procedure) extras.strings_unbounded.append[unbounded_string,unbounded_string] (VHDL procedure) extras.strings_unbounded.copy[string,unbounded_string,integer] (VHDL procedure) extras.strings_unbounded.copy[unbounded_string,unbounded_string,integer] (VHDL procedure) extras.strings_unbounded.count[unbounded_string,string,natural] (VHDL procedure) extras.strings_unbounded.delete[unbounded_string,positive,natural] (VHDL procedure) extras.strings_unbounded.element[unbounded_string,positive,character] (VHDL procedure) extras.strings_unbounded.eq[unbounded_string,string,boolean] (VHDL procedure) extras.strings_unbounded.eq[unbounded_string,unbounded_string,boolean] (VHDL procedure) extras.strings_unbounded.find_token[unbounded_string,character_set,membership,positive,natural] (VHDL procedure) extras.strings_unbounded.free[unbounded_string] (VHDL procedure) extras.strings_unbounded.head[unbounded_string,natural,character] (VHDL procedure) extras.strings_unbounded.initialize[unbounded_string] (VHDL procedure) extras.strings_unbounded.insert[unbounded_string,positive,string] (VHDL procedure) extras.strings_unbounded.length[unbounded_string,natural] (VHDL procedure) extras.strings_unbounded.overwrite[unbounded_string,positive,string] (VHDL procedure) extras.strings_unbounded.replace_element[unbounded_string,positive,character] (VHDL procedure) extras.strings_unbounded.replace_slice[unbounded_string,positive,natural,string] (VHDL procedure) extras.strings_unbounded.slice[unbounded_string,positive,positive,unbounded_string] (VHDL procedure) extras.strings_unbounded.tail[unbounded_string,natural,character] (VHDL procedure) extras.strings_unbounded.to_string[unbounded_string,string] (VHDL procedure) extras.strings_unbounded.to_unbounded_string[natural return unbounded_string] (VHDL function) extras.strings_unbounded.to_unbounded_string[string return unbounded_string] (VHDL function) extras.strings_unbounded.translate[unbounded_string,character_mapping] (VHDL procedure) extras.strings_unbounded.trim[unbounded_string,character_set,character_set] (VHDL procedure) extras.strings_unbounded.trim[unbounded_string,trim_end] (VHDL procedure) extras.strings_unbounded.unbounded_string (VHDL type) extras.synchronizing (package) extras.synchronizing.bit_synchronizer (VHDL entity) extras.synchronizing.handshake_synchronizer (VHDL entity) extras.synchronizing.reset_synchronizer (VHDL entity) extras.text_buffering (package) extras.text_buffering.append[string,text_buffer] (VHDL procedure) extras.text_buffering.append[unbounded_string,text_buffer] (VHDL procedure) extras.text_buffering.append_file[string,text_buffer] (VHDL procedure) extras.text_buffering.append_file[text,text_buffer] (VHDL procedure) extras.text_buffering.buffer_line (VHDL type) extras.text_buffering.buffer_line_acc (VHDL type) extras.text_buffering.endbuffer[text_buffer,boolean] (VHDL procedure) extras.text_buffering.free[text_buffer] (VHDL procedure) extras.text_buffering.load_buffer[string,text_buffer] (VHDL procedure) extras.text_buffering.load_buffer[text,text_buffer] (VHDL procedure) extras.text_buffering.nextline[text_buffer,unbounded_string] (VHDL procedure) extras.text_buffering.setline[text_buffer,positive] (VHDL procedure) extras.text_buffering.text_buffer (VHDL type) extras.text_buffering.write[string,text_buffer] (VHDL procedure) extras.text_buffering.write[text,text_buffer] (VHDL procedure) extras.timing_ops (package) extras.timing_ops.clock_cycles (VHDL type) extras.timing_ops.clock_gen[std_ulogic,boolean,delay_length,duty_cycle] (VHDL procedure) extras.timing_ops.clock_gen[std_ulogic,boolean,frequency,duty_cycle] (VHDL procedure) extras.timing_ops.duty_cycle (VHDL type) extras.timing_ops.frequency (VHDL type) extras.timing_ops.report_time_precision[string,clock_cycles,real,real] (VHDL procedure) extras.timing_ops.report_time_precision[string,clock_cycles,time,time] (VHDL procedure) extras.timing_ops.resolution_limit[ return delay_length] (VHDL function) extras.timing_ops.time_duration[clock_cycles,delay_length return delay_length] (VHDL function) extras.timing_ops.time_duration[clock_cycles,real return delay_length] (VHDL function) extras.timing_ops.time_duration[clock_cycles,real return real] (VHDL function) extras.timing_ops.TIME_ROUND_STYLE (VHDL constant) extras.timing_ops.time_rounding (VHDL type) extras.timing_ops.to_clock_cycles[delay_length,delay_length return clock_cycles] (VHDL function) extras.timing_ops.to_clock_cycles[delay_length,frequency,time_rounding return clock_cycles] (VHDL function) extras.timing_ops.to_clock_cycles[delay_length,real,time_rounding return clock_cycles] (VHDL function) extras.timing_ops.to_clock_cycles[real,delay_length,time_rounding return clock_cycles] (VHDL function) extras.timing_ops.to_clock_cycles[real,frequency,time_rounding return clock_cycles] (VHDL function) extras.timing_ops.to_clock_cycles[real,real,time_rounding return clock_cycles] (VHDL function) extras.timing_ops.to_frequency[delay_length return frequency] (VHDL function) extras.timing_ops.to_frequency[real return frequency] (VHDL function) extras.timing_ops.to_period[frequency return delay_length] (VHDL function) extras.timing_ops.to_period[real return delay_length] (VHDL function) extras.timing_ops.to_real[frequency return real] (VHDL function) extras.timing_ops.to_real[time return real] (VHDL function) extras.timing_ops.to_time[real return time] (VHDL function) extras_2008.common (package) extras_2008.common.signed_array (VHDL type) extras_2008.common.slv_array (VHDL type) extras_2008.common.sulv_array (VHDL type) extras_2008.common.to_signed_array[signed return signed_array] (VHDL function) extras_2008.common.to_signed_array[slv_array return signed_array] (VHDL function) extras_2008.common.to_signed_array[sulv_array return signed_array] (VHDL function) extras_2008.common.to_signed_array[unsigned_array return signed_array] (VHDL function) extras_2008.common.to_slv_array[signed_array return slv_array] (VHDL function) extras_2008.common.to_slv_array[std_logic_vector return slv_array] (VHDL function) extras_2008.common.to_slv_array[sulv_array return slv_array] (VHDL function) extras_2008.common.to_slv_array[unsigned_array return slv_array] (VHDL function) extras_2008.common.to_sulv_array[signed_array return sulv_array] (VHDL function) extras_2008.common.to_sulv_array[slv_array return sulv_array] (VHDL function) extras_2008.common.to_sulv_array[std_ulogic_vector return sulv_array] (VHDL function) extras_2008.common.to_sulv_array[unsigned_array return sulv_array] (VHDL function) extras_2008.common.to_unsigned_array[signed_array return unsigned_array] (VHDL function) extras_2008.common.to_unsigned_array[slv_array return unsigned_array] (VHDL function) extras_2008.common.to_unsigned_array[sulv_array return unsigned_array] (VHDL function) extras_2008.common.to_unsigned_array[unsigned return unsigned_array] (VHDL function) extras_2008.common.unsigned_array (VHDL type) extras_2008.filtering (package) extras_2008.filtering.attenuate (VHDL entity) extras_2008.filtering.attenuation_factor (VHDL type) extras_2008.filtering.attenuation_gain[attenuation_factor,positive return signed] (VHDL function) extras_2008.filtering.fir_filter (VHDL entity) extras_2008.filtering.lowpass_alpha[real,real return real] (VHDL function) extras_2008.filtering.lowpass_filter (VHDL entity) extras_2008.filtering.sample_and_hold (VHDL entity) extras_2008.filtering.sampler (VHDL entity) extras_2008.muxing (package) extras_2008.muxing.decode[unsigned return std_ulogic_vector] (VHDL function) extras_2008.muxing.decode[unsigned,positive return std_ulogic_vector] (VHDL function) extras_2008.muxing.demux[std_ulogic,unsigned,positive return std_ulogic_vector] (VHDL function) extras_2008.muxing.mux[std_ulogic_vector,std_ulogic_vector return std_ulogic] (VHDL function) extras_2008.muxing.mux[std_ulogic_vector,unsigned return std_ulogic] (VHDL function) extras_2008.muxing.mux[sulv_array,unsigned return std_ulogic_vector] (VHDL function) extras_2008.pipelining (package) extras_2008.pipelining.tapped_delay_line (VHDL entity) extras_2008.reg_file_pkg (package) extras_2008.reg_file_pkg.reg_file (VHDL entity) extras_2008.strings_bounded (package) extras_2008.strings_bounded."&"[bounded_string,bounded_string return bounded_string] (VHDL function) extras_2008.strings_bounded."&"[bounded_string,character return bounded_string] (VHDL function) extras_2008.strings_bounded."&"[bounded_string,string return bounded_string] (VHDL function) extras_2008.strings_bounded."&"[character,bounded_string return bounded_string] (VHDL function) extras_2008.strings_bounded."&"[string,bounded_string return bounded_string] (VHDL function) extras_2008.strings_bounded."*"[natural,bounded_string return bounded_string] (VHDL function) extras_2008.strings_bounded."*"[natural,character return bounded_string] (VHDL function) extras_2008.strings_bounded."*"[natural,string return bounded_string] (VHDL function) extras_2008.strings_bounded."<"[bounded_string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded."<"[bounded_string,string return boolean] (VHDL function) extras_2008.strings_bounded."<"[string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded."<="[bounded_string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded."<="[bounded_string,string return boolean] (VHDL function) extras_2008.strings_bounded."<="[string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded."="[bounded_string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded."="[bounded_string,string return boolean] (VHDL function) extras_2008.strings_bounded."="[string,bounded_string return boolean] (VHDL function) "[bounded_string,bounded_string return boolean]">extras_2008.strings_bounded.">"[bounded_string,bounded_string return boolean] (VHDL function) "[bounded_string,string return boolean]">extras_2008.strings_bounded.">"[bounded_string,string return boolean] (VHDL function) "[string,bounded_string return boolean]">extras_2008.strings_bounded.">"[string,bounded_string return boolean] (VHDL function) ="[bounded_string,bounded_string return boolean]">extras_2008.strings_bounded.">="[bounded_string,bounded_string return boolean] (VHDL function) ="[bounded_string,string return boolean]">extras_2008.strings_bounded.">="[bounded_string,string return boolean] (VHDL function) ="[string,bounded_string return boolean]">extras_2008.strings_bounded.">="[string,bounded_string return boolean] (VHDL function) extras_2008.strings_bounded.append[bounded_string,bounded_string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.append[bounded_string,bounded_string,truncation] (VHDL procedure) extras_2008.strings_bounded.append[bounded_string,character,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.append[bounded_string,character,truncation] (VHDL procedure) extras_2008.strings_bounded.append[bounded_string,string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.append[bounded_string,string,truncation] (VHDL procedure) extras_2008.strings_bounded.append[character,bounded_string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.append[string,bounded_string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.bounded_string (VHDL type) extras_2008.strings_bounded.count[bounded_string,character_set return natural] (VHDL function) extras_2008.strings_bounded.count[bounded_string,string,character_mapping return natural] (VHDL function) extras_2008.strings_bounded.delete[bounded_string,positive,natural return bounded_string] (VHDL function) extras_2008.strings_bounded.delete[bounded_string,positive,natural] (VHDL procedure) extras_2008.strings_bounded.element[bounded_string,positive return character] (VHDL function) extras_2008.strings_bounded.find_token[bounded_string,character_set,membership,positive,natural] (VHDL procedure) extras_2008.strings_bounded.head[bounded_string,natural,character,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.head[bounded_string,natural,character,truncation] (VHDL procedure) extras_2008.strings_bounded.index[bounded_string,character_set,membership,direction return natural] (VHDL function) extras_2008.strings_bounded.index[bounded_string,string,direction,character_mapping return natural] (VHDL function) extras_2008.strings_bounded.index_non_blank[bounded_string,direction return natural] (VHDL function) extras_2008.strings_bounded.insert[bounded_string,positive,string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.insert[bounded_string,positive,string,truncation] (VHDL procedure) extras_2008.strings_bounded.length[bounded_string return length_range] (VHDL function) extras_2008.strings_bounded.length_range (VHDL type) extras_2008.strings_bounded.overwrite[bounded_string,positive,string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.overwrite[bounded_string,positive,string,truncation] (VHDL procedure) extras_2008.strings_bounded.replace_element[bounded_string,positive,character] (VHDL procedure) extras_2008.strings_bounded.replace_slice[bounded_string,positive,natural,string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.replace_slice[bounded_string,positive,natural,string,truncation] (VHDL procedure) extras_2008.strings_bounded.replicate[natural,bounded_string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.replicate[natural,character,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.replicate[natural,string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.slice[bounded_string,positive,natural return string] (VHDL function) extras_2008.strings_bounded.tail[bounded_string,natural,character,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.tail[bounded_string,natural,character,truncation] (VHDL procedure) extras_2008.strings_bounded.to_bounded_string[string,truncation return bounded_string] (VHDL function) extras_2008.strings_bounded.to_string[bounded_string return string] (VHDL function) extras_2008.strings_bounded.translate[bounded_string,character_mapping return bounded_string] (VHDL function) extras_2008.strings_bounded.translate[bounded_string,character_mapping] (VHDL procedure) extras_2008.strings_bounded.trim[bounded_string,character_set,character_set return bounded_string] (VHDL function) extras_2008.strings_bounded.trim[bounded_string,character_set,character_set] (VHDL procedure) extras_2008.strings_bounded.trim[bounded_string,trim_end return bounded_string] (VHDL function) extras_2008.strings_bounded.trim[bounded_string,trim_end] (VHDL procedure)

F

Feminine_Ordinal_Indicator (VHDL constant) fibonacci_lfsr (VHDL entity) fifo (VHDL entity) find_token[bounded_string,character_set,membership,positive,natural] (VHDL procedure) find_token[string,character_set,membership,positive,natural] (VHDL procedure) find_token[unbounded_string,character_set,membership,positive,natural] (VHDL procedure) fir_filter (VHDL entity) fixed_delay_line (VHDL entity) fixed_delay_line_signed (VHDL entity) fixed_delay_line_sulv (VHDL entity) fixed_delay_line_unsigned (VHDL entity)

fixed_oscillator (VHDL entity) fixed_oscillator_sequential (VHDL entity) floor_log2[positive return natural] (VHDL function) floor_log[positive,positive return natural] (VHDL function) Fraction_One_Half (VHDL constant) Fraction_One_Quarter (VHDL constant) Fraction_Three_Quarters (VHDL constant) free[text_buffer] (VHDL procedure) free[unbounded_string] (VHDL procedure) frequency (VHDL type) Full_Stop (VHDL constant)

G

galois_lfsr (VHDL entity) gen_count_ones_table[positive return natural_vector] (VHDL function) get_data[ecc_vector return std_ulogic_vector] (VHDL function) get_parity[ecc_vector return unsigned] (VHDL function)

glitch_filter (VHDL entity) GRAPHIC_SET (VHDL constant) Grave (VHDL constant) gray_counter (VHDL entity) Greater_Than_Sign (VHDL constant)

H

hamming_data_size[positive return positive] (VHDL function) hamming_decode[ecc_vector return std_ulogic_vector] (VHDL function) hamming_decode[std_ulogic_vector,unsigned return std_ulogic_vector] (VHDL function) hamming_encode[std_ulogic_vector return ecc_vector] (VHDL function) hamming_encode[std_ulogic_vector,unsigned return ecc_vector] (VHDL function) hamming_has_error[ecc_vector return boolean] (VHDL function) hamming_has_error[unsigned return boolean] (VHDL function) hamming_indices[positive return ecc_range] (VHDL function) hamming_interleave[ecc_vector return std_ulogic_vector] (VHDL function) hamming_interleave[std_ulogic_vector,unsigned return std_ulogic_vector] (VHDL function) hamming_message_size[positive return positive] (VHDL function)

hamming_parity[std_ulogic_vector return unsigned] (VHDL function) hamming_parity_size[positive return positive] (VHDL function) handshake_synchronizer (VHDL entity) hash[string return natural] (VHDL function) head[bounded_string,natural,character,truncation return bounded_string] (VHDL function) head[bounded_string,natural,character,truncation] (VHDL procedure) head[string,natural,alignment,character] (VHDL procedure) head[string,natural,character return string] (VHDL function) head[unbounded_string,natural,character] (VHDL procedure) HEXADECIMAL_DIGIT_SET (VHDL constant) Hyphen (VHDL constant)

I

IDENTITY (VHDL constant) index[bounded_string,character_set,membership,direction return natural] (VHDL function) index[bounded_string,string,direction,character_mapping return natural] (VHDL function) index[string,character_set,membership,direction return natural] (VHDL function) index[string,string,direction,character_mapping return natural] (VHDL function) index_non_blank[bounded_string,direction return natural] (VHDL function) index_non_blank[string,direction return natural] (VHDL function) init_crc[bit_vector return bit_vector] (VHDL function) initialize[unbounded_string] (VHDL procedure) insert[bounded_string,positive,string,truncation return bounded_string] (VHDL function) insert[bounded_string,positive,string,truncation] (VHDL procedure) insert[string,positive,string return string] (VHDL function) insert[string,positive,string,truncation] (VHDL procedure) insert[unbounded_string,positive,string] (VHDL procedure) INSERT_DOUBLE (VHDL constant) INSERT_NONE (VHDL constant)

INSERT_SINGLE (VHDL constant) interrupt_ctl (VHDL entity) Inverted_Exclamation (VHDL constant) Inverted_Question (VHDL constant) Is_Alphanumeric[character return boolean] (VHDL function) Is_Basic[character return boolean] (VHDL function) Is_Control[character return boolean] (VHDL function) Is_Digit[character return boolean] (VHDL function) Is_Graphic[character return boolean] (VHDL function) Is_Hexadecimal_Digit[character return boolean] (VHDL function) is_in[character,character_set return boolean] (VHDL function) Is_Letter[character return boolean] (VHDL function) Is_Lower[character return boolean] (VHDL function) Is_Special[character return boolean] (VHDL function) is_subset[character_set,character_set return boolean] (VHDL function) Is_Upper[character return boolean] (VHDL function) ISO_646_SET (VHDL constant)

L

LC_A (VHDL constant) LC_A_Acute (VHDL constant) LC_A_Circumflex (VHDL constant) LC_A_Diaeresis (VHDL constant) LC_A_Grave (VHDL constant) LC_A_Ring (VHDL constant) LC_A_Tilde (VHDL constant) LC_AE_Diphthong (VHDL constant) LC_B (VHDL constant) LC_C (VHDL constant) LC_C_Cedilla (VHDL constant) LC_D (VHDL constant) LC_E (VHDL constant) LC_E_Acute (VHDL constant) LC_E_Circumflex (VHDL constant) LC_E_Diaeresis (VHDL constant) LC_E_Grave (VHDL constant) LC_F (VHDL constant) LC_G (VHDL constant) LC_German_Sharp_S (VHDL constant) LC_H (VHDL constant) LC_I (VHDL constant) LC_I_Acute (VHDL constant) LC_I_Circumflex (VHDL constant) LC_I_Diaeresis (VHDL constant) LC_I_Grave (VHDL constant) LC_Icelandic_Eth (VHDL constant) LC_Icelandic_Thorn (VHDL constant) LC_J (VHDL constant) LC_K (VHDL constant) LC_L (VHDL constant) LC_M (VHDL constant) LC_N (VHDL constant) LC_N_Tilde (VHDL constant) LC_O (VHDL constant) LC_O_Acute (VHDL constant) LC_O_Circumflex (VHDL constant) LC_O_Diaeresis (VHDL constant) LC_O_Grave (VHDL constant)

LC_O_Oblique_Stroke (VHDL constant) LC_O_Tilde (VHDL constant) LC_P (VHDL constant) LC_Q (VHDL constant) LC_R (VHDL constant) LC_S (VHDL constant) LC_T (VHDL constant) LC_U (VHDL constant) LC_U_Acute (VHDL constant) LC_U_Circumflex (VHDL constant) LC_U_Diaeresis (VHDL constant) LC_U_Grave (VHDL constant) LC_V (VHDL constant) LC_W (VHDL constant) LC_X (VHDL constant) LC_Y (VHDL constant) LC_Y_Acute (VHDL constant) LC_Y_Diaeresis (VHDL constant) LC_Z (VHDL constant) lcar_rule[positive return std_ulogic_vector] (VHDL function) Left_Angle_Quotation (VHDL constant) Left_Curly_Bracket (VHDL constant) Left_Parenthesis (VHDL constant) Left_Square_Bracket (VHDL constant) length[bounded_string return length_range] (VHDL function) length[unbounded_string,natural] (VHDL procedure) length_range (VHDL type) Less_Than_Sign (VHDL constant) LETTER_SET (VHDL constant) lfsr_coefficients (VHDL type) lfsr_kind (VHDL type) lfsr_taps[positive return std_ulogic_vector] (VHDL function) load_buffer[string,text_buffer] (VHDL procedure) load_buffer[text,text_buffer] (VHDL procedure) Low_Line (VHDL constant) LOWER_CASE_MAP (VHDL constant) LOWER_SET (VHDL constant) lowpass_alpha[real,real return real] (VHDL function) lowpass_filter (VHDL entity)

M

Macron (VHDL constant) Masculine_Ordinal_Indicator (VHDL constant) membership (VHDL type) Micro_Sign (VHDL constant) Middle_Dot (VHDL constant)

min_fraction_bits[real,real,natural,real return natural] (VHDL function) move[string,string,truncation,alignment,character] (VHDL procedure) Multiplication_Sign (VHDL constant) mux[std_ulogic_vector,std_ulogic_vector return std_ulogic] (VHDL function), [1] mux[std_ulogic_vector,unsigned return std_ulogic] (VHDL function), [1] mux[sulv_array,unsigned return std_ulogic_vector] (VHDL function)

N

natural_vector (VHDL type) next_crc[bit_vector,bit_vector,boolean,bit_vector return bit_vector] (VHDL function) next_fibonacci_lfsr[std_ulogic_vector,std_ulogic_vector,lfsr_kind,boolean return std_ulogic_vector] (VHDL function) next_galois_lfsr[std_ulogic_vector,std_ulogic_vector,lfsr_kind,boolean return std_ulogic_vector] (VHDL function) next_wolfram_lcar[std_ulogic_vector,std_ulogic_vector,std_ulogic,std_ulogic return std_ulogic_vector] (VHDL function)

nextline[text_buffer,unbounded_string] (VHDL procedure) No_Break_Space (VHDL constant) Not_Sign (VHDL constant) NULL_SET (VHDL constant) Number_Sign (VHDL constant)

O

octet_file (VHDL type) overwrite[bounded_string,positive,string,truncation return bounded_string] (VHDL function) overwrite[bounded_string,positive,string,truncation] (VHDL procedure)

overwrite[string,positive,string return string] (VHDL function) overwrite[string,positive,string,truncation] (VHDL procedure) overwrite[unbounded_string,positive,string] (VHDL procedure)

P

packet_fifo (VHDL entity) parity[parity_kind,std_ulogic_vector return std_ulogic] (VHDL function) parity_kind (VHDL type) Percent_Sign (VHDL constant) Pilcrow_Sign (VHDL constant) pipeline_s (VHDL entity) pipeline_slv (VHDL entity)

pipeline_sulv (VHDL entity) pipeline_u (VHDL entity) pipeline_ul (VHDL entity) pipelined_adder (VHDL entity) Plus_Minus_Sign (VHDL constant) Plus_Sign (VHDL constant) Pound_Sign (VHDL constant)

Q

Question (VHDL constant)

Quotation (VHDL constant)

R

radians_to_phase[real,positive return unsigned] (VHDL function) randint[integer,integer return integer] (VHDL function) random[ return boolean] (VHDL function) random[ return character] (VHDL function) random[ return natural] (VHDL function) random[ return real] (VHDL function) random[positive return bit_vector] (VHDL function) randtime[time,time return time] (VHDL function) read[octet_file,endianness,signed] (VHDL procedure) read[octet_file,endianness,unsigned] (VHDL procedure) reg_array (VHDL type) reg_file (VHDL entity), [1] reg_word (VHDL type) Registered_Trade_Mark_Sign (VHDL constant) replace_element[bounded_string,positive,character] (VHDL procedure) replace_element[unbounded_string,positive,character] (VHDL procedure) replace_slice[bounded_string,positive,natural,string,truncation return bounded_string] (VHDL function) replace_slice[bounded_string,positive,natural,string,truncation] (VHDL procedure)

replace_slice[string,positive,natural,string return string] (VHDL function) replace_slice[string,positive,natural,string,truncation,alignment,character] (VHDL procedure) replace_slice[unbounded_string,positive,natural,string] (VHDL procedure) replicate[natural,bounded_string,truncation return bounded_string] (VHDL function) replicate[natural,character,truncation return bounded_string] (VHDL function) replicate[natural,string,truncation return bounded_string] (VHDL function) report_time_precision[string,clock_cycles,real,real] (VHDL procedure) report_time_precision[string,clock_cycles,time,time] (VHDL procedure) reset_synchronizer (VHDL entity) resize_fractional[unsigned,positive return unsigned] (VHDL function) resolution_limit[ return delay_length] (VHDL function) Reverse_Solidus (VHDL constant) Right_Angle_Quotation (VHDL constant) Right_Curly_Bracket (VHDL constant) Right_Parenthesis (VHDL constant) Right_Square_Bracket (VHDL constant) rom (VHDL entity) rom_format (VHDL type) rotate[integer,signed,signed,signed,signed,signed,signed] (VHDL procedure)

S

sample_and_hold (VHDL entity) sampler (VHDL entity) secded_codec (VHDL entity) secded_data_size[positive return positive] (VHDL function) secded_decode[ecc_vector return std_ulogic_vector] (VHDL function) secded_encode[std_ulogic_vector return ecc_vector] (VHDL function) secded_encode[std_ulogic_vector,unsigned return ecc_vector] (VHDL function) secded_error_kind (VHDL type) secded_errors (VHDL type) secded_has_errors[ecc_vector return secded_errors] (VHDL function) secded_has_errors[ecc_vector,unsigned return secded_errors] (VHDL function) secded_indices[positive return ecc_range] (VHDL function) secded_message_size[positive return positive] (VHDL function) secded_parity_size[positive return positive] (VHDL function) Section_Sign (VHDL constant) seed[positive,positive] (VHDL procedure) seed[positive] (VHDL procedure)

Semicolon (VHDL constant) setline[text_buffer,positive] (VHDL procedure) signed_array (VHDL type) signed_size[integer return natural] (VHDL function) simple_fifo (VHDL entity) sincos_pipelined (VHDL entity) sincos_sequential (VHDL entity) slice[bounded_string,positive,natural return string] (VHDL function) slice[unbounded_string,positive,positive,unbounded_string] (VHDL procedure) slv_array (VHDL type) Soft_Hyphen (VHDL constant) Solidus (VHDL constant) Space (VHDL constant) SPECIAL_SET (VHDL constant) sulv_array (VHDL type) Superscript_One (VHDL constant) Superscript_Three (VHDL constant) Superscript_Two (VHDL constant)

T

tail[bounded_string,natural,character,truncation return bounded_string] (VHDL function) tail[bounded_string,natural,character,truncation] (VHDL procedure) tail[string,natural,alignment,character] (VHDL procedure) tail[string,natural,character return string] (VHDL function) tail[unbounded_string,natural,character] (VHDL procedure) tapped_delay_line (VHDL entity) text_buffer (VHDL type) Tilde (VHDL constant) time_duration[clock_cycles,delay_length return delay_length] (VHDL function) time_duration[clock_cycles,real return delay_length] (VHDL function) time_duration[clock_cycles,real return real] (VHDL function) TIME_ROUND_STYLE (VHDL constant) time_rounding (VHDL type) To_Basic[character return character] (VHDL function) To_Basic[string return string] (VHDL function) to_bcd[unsigned return unsigned] (VHDL function) to_binary[std_logic_vector return std_logic_vector] (VHDL function) to_binary[std_ulogic_vector return std_ulogic_vector] (VHDL function) to_binary[unsigned return unsigned] (VHDL function), [1] to_bounded_string[string,truncation return bounded_string] (VHDL function) to_clock_cycles[delay_length,delay_length return clock_cycles] (VHDL function) to_clock_cycles[delay_length,frequency,time_rounding return clock_cycles] (VHDL function) to_clock_cycles[delay_length,real,time_rounding return clock_cycles] (VHDL function) to_clock_cycles[real,delay_length,time_rounding return clock_cycles] (VHDL function) to_clock_cycles[real,frequency,time_rounding return clock_cycles] (VHDL function) to_clock_cycles[real,real,time_rounding return clock_cycles] (VHDL function) to_domain[character_mapping return character_sequence] (VHDL function) to_ecc_vec[std_ulogic_vector,natural return ecc_vector] (VHDL function) to_frequency[delay_length return frequency] (VHDL function) to_frequency[real return frequency] (VHDL function) to_gray[std_logic_vector return std_logic_vector] (VHDL function) to_gray[std_ulogic_vector return std_ulogic_vector] (VHDL function) to_gray[unsigned return unsigned] (VHDL function) To_Lower[character return character] (VHDL function) To_Lower[string return string] (VHDL function) to_mapping[character_sequence,character_sequence return character_mapping] (VHDL function) to_period[frequency return delay_length] (VHDL function) to_period[real return delay_length] (VHDL function) to_range[character_mapping return character_sequence] (VHDL function) to_ranges[character_set return character_ranges] (VHDL function) to_real[frequency return real] (VHDL function) to_real[time return real] (VHDL function) to_sequence[character_set return character_sequence] (VHDL function) to_set[character return character_set] (VHDL function)

to_set[character_range return character_set] (VHDL function) to_set[character_ranges return character_set] (VHDL function) to_set[character_sequence return character_set] (VHDL function) to_signed_array[signed return signed_array] (VHDL function) to_signed_array[slv_array return signed_array] (VHDL function) to_signed_array[sulv_array return signed_array] (VHDL function) to_signed_array[unsigned_array return signed_array] (VHDL function) to_slv_array[signed_array return slv_array] (VHDL function) to_slv_array[std_logic_vector return slv_array] (VHDL function) to_slv_array[sulv_array return slv_array] (VHDL function) to_slv_array[unsigned_array return slv_array] (VHDL function) to_string[bounded_string return string] (VHDL function) to_string[unbounded_string,string] (VHDL procedure) to_sulv[ecc_vector return std_ulogic_vector] (VHDL function) to_sulv_array[signed_array return sulv_array] (VHDL function) to_sulv_array[slv_array return sulv_array] (VHDL function) to_sulv_array[std_ulogic_vector return sulv_array] (VHDL function) to_sulv_array[unsigned_array return sulv_array] (VHDL function) to_tap_map[lfsr_coefficients,positive,boolean return std_ulogic_vector] (VHDL function) to_time[real return time] (VHDL function) to_unbounded_string[natural return unbounded_string] (VHDL function) to_unbounded_string[string return unbounded_string] (VHDL function) to_unsigned_array[signed_array return unsigned_array] (VHDL function) to_unsigned_array[slv_array return unsigned_array] (VHDL function) to_unsigned_array[sulv_array return unsigned_array] (VHDL function) to_unsigned_array[unsigned return unsigned_array] (VHDL function) To_Upper[character return character] (VHDL function) To_Upper[string return string] (VHDL function) translate[bounded_string,character_mapping return bounded_string] (VHDL function) translate[bounded_string,character_mapping] (VHDL procedure) translate[string,character_mapping return string] (VHDL function) translate[string,character_mapping] (VHDL procedure) translate[unbounded_string,character_mapping] (VHDL procedure) trim[bounded_string,character_set,character_set return bounded_string] (VHDL function) trim[bounded_string,character_set,character_set] (VHDL procedure) trim[bounded_string,trim_end return bounded_string] (VHDL function) trim[bounded_string,trim_end] (VHDL procedure) trim[string,character_set,character_set return string] (VHDL function) trim[string,character_set,character_set,alignment,character] (VHDL procedure) trim[string,trim_end return string] (VHDL function) trim[string,trim_end,alignment,character] (VHDL procedure) trim[unbounded_string,character_set,character_set] (VHDL procedure) trim[unbounded_string,trim_end] (VHDL procedure) trim_end (VHDL type) truncation (VHDL type)

U

UC_A_Acute (VHDL constant) UC_A_Circumflex (VHDL constant) UC_A_Diaeresis (VHDL constant) UC_A_Grave (VHDL constant) UC_A_Ring (VHDL constant) UC_A_Tilde (VHDL constant) UC_AE_Diphthong (VHDL constant) UC_C_Cedilla (VHDL constant) UC_E_Acute (VHDL constant) UC_E_Circumflex (VHDL constant) UC_E_Diaeresis (VHDL constant) UC_E_Grave (VHDL constant) UC_I_Acute (VHDL constant) UC_I_Circumflex (VHDL constant) UC_I_Diaeresis (VHDL constant) UC_I_Grave (VHDL constant) UC_Icelandic_Eth (VHDL constant)

UC_Icelandic_Thorn (VHDL constant) UC_N_Tilde (VHDL constant) UC_O_Acute (VHDL constant) UC_O_Circumflex (VHDL constant) UC_O_Diaeresis (VHDL constant) UC_O_Grave (VHDL constant) UC_O_Oblique_Stroke (VHDL constant) UC_O_Tilde (VHDL constant) UC_U_Acute (VHDL constant) UC_U_Circumflex (VHDL constant) UC_U_Diaeresis (VHDL constant) UC_U_Grave (VHDL constant) UC_Y_Acute (VHDL constant) unbounded_string (VHDL type) unsigned_array (VHDL type) UPPER_CASE_MAP (VHDL constant) UPPER_SET (VHDL constant)

V

value[character_mapping,character return character] (VHDL function)

vector[integer,signed,signed,signed,signed,signed,signed] (VHDL procedure) Vertical_Line (VHDL constant)

W

wolfram_lcar (VHDL entity) write[octet_file,endianness,signed] (VHDL procedure)

write[octet_file,endianness,unsigned] (VHDL procedure) write[string,text_buffer] (VHDL procedure) write[text,text_buffer] (VHDL procedure)

Y

Yen_Sign (VHDL constant)